Hi, I’m Victor. I’m a PhD student working with Daniel Sanchez at MIT CSAIL. My primary work is in the Swarm project, which seeks to build new abstractions between hardware and software that make it as easy to exploit multicore parallelism as it is to write ordinary sequential programs. My work spans computer architecture, compilers, and applications. I seek not only to make it easy to scale workloads where parallelization is expensive and error-prone today, but also to make it practical to scale workloads that today’s systems cannot scale at all.
Before coming to MIT, I received my BSE in electrical engineering from Princeton, where I worked with Sharad Malik on Boolean satisfiability solvers. I have also done internships working on the design of hardware systems at NVIDIA Research, Pure Storage, and NIST.
You can access my curriculum vitae here.
See CV above for all publications
Compiling ordinary sequential C and C++ programs to run in parallel on Swarm. Challenging applications are scaled to tens of cores, without requiring the programmer to indicate what code is safe to parallelize.
An infrastructure for exploring the design space of deep neural network (DNN) accelerators, including an expressive and concise representation of hardware topologies and choices about dataflow orchestration, as well as efficient modeling of performance and energy that enables exploring trade-offs by searching through large spaces of potential accelerator designs.
Extending Swarm’s hardware and software mechanisms to enable speculative and non-speculative tasks to coordinate on shared data structures, to enable unrestricted tasks, and to allow expert programmers to safely implement efficient and scalable system services, such as memory allocation, within speculative tasks, improving performance by up to 69×.
A new execution model that enhances the Swarm hardware architecture, a general-purpose multicore architecture that makes it easy to exploit more parallelism in many applications. Outperforms prior systems by up to 88×.